SIwave is a full-wave Power Integrity (PI), Signal Integrity (SI), and Electromagnetic Interference (EMI) analysis tool. It can model, design, verify, optimize, and debug PI/SI/EMI behavior in PCBs, packages, IC-substrates, and dies (or any combination of them). One of the most powerful features in SIwave is the PI Advisor. PI Advisor evaluates the PDN impedance and recommends the optimal number and values of decoupling capacitors needed to meet a specified target impedance.
However, PI Advisor does not optimize capacitor placement; the user must determine the locations based on layout constraints and return-current paths.

Load Categories (Corrected Engineering Definitions)

PDN design typically considers three categories of load behavior:

1. Loads with relatively constant current consumption

Examples: LNAs, HPAs, clock buffers, SerDes bias circuits.

These devices draw a nearly steady current, with limited high-frequency transients.
Goal: minimize supply noise and ensure clean biasing.

• Capacitors are chosen primarily for noise suppression, not transient supply.

• Broadband decoupling is used to keep supply ripple low across operating frequencies.

2. Loads with large and fast dynamic current transients

Examples: CPUs, GPUs, FPGAs, ASIC cores, DDR, high-speed digital logic.

These devices generate large di/dt during switching.
Goal: achieve low PDN impedance (Z_target) over a wide bandwidth.

• Decaps must supply fast transient current during switching edges.

• The PDN impedance must stay below the target impedance, derived from

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• PI Advisor is designed for this load type, since maintaining low impedance across frequency is the main requirement.

3. Loads with large but periodic or burst-type current draws

Examples: high-speed ADCs/DACs, RF transceivers, SERDES transmitters during burst operation.

These loads demand large instantaneous charge, often synchronized to clocks.
Important: PI Advisor is less suitable for these loads because:

• The primary requirement is energy storage, not just meeting a frequency-domain impedance target.

• Transient behavior dominates; the VRM response time (typically tens of µs) is too slow for these bursts.

• Local capacitors must provide the required charge for several cycles until the VRM recovers.

Thus, for this type, manual engineering judgement and transient analysis (time-domain PI) are required.

Load the PCB design containing the Type-2 power planes and launch the PI Wizard to assign ports. Ensure that a port is included for the VRM, since its output impedance will be entered later in the PI Advisor. After assigning the ports, launch the PI Advisor.

In the first section of the PI Advisor window, select the load port, and just below it specify the VRM port.
Enter the VRM output impedance, which will replace the VRM port in the optimization process.

Next, define the target Z11 profile by right-clicking inside the Z11 table and adding one frequency band at a time. Make sure the target curve is close to—or slightly below—the current Z11 of the power net.

Specify the limit line

Choose the set of capacitors that the PI Advisor is allowed to modify.

In the capacitor-selection page:

1. First, select all existing capacitors.

   
   

2. Apply the filter to restrict the list to only the capacitors that the PI Advisor is permitted to modify.

   

3. Select the final list of possible capacitor candidates, then click Assign Selected Candidates to move them to the list at the bottom-left corner.

   

This assignment means that any existing capacitor in the design may be replaced with any of the selected candidate values. Users may also divide the existing capacitors into groups and assign separate candidate lists to each group. Repeat this process for all groups as needed.

Next, is the final setup of the optimizer:

In the optimizer configuration:

1. Select which attributes the PI Advisor should optimize (e.g., impedance, capacitor count, cost).

2. Assign a weight to each activated attribute.

3. Set the number of members per generation, which determines how many trial designs are created in each optimization cycle.

4. Set the number of generations (optimization cycles).

5. Specify how many solution candidates to report at the end.

6. Enter the target values for each active attribute.

7. Define the simulation frequency range.

Looking at the solution, and select one scheme.